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| (R) SP706P/R/S/T, SP708R/S/T +3.0V/+3.3V Low Power Microprocessor Supervisory Circuits s Precision Low Voltage Monitor: SP706P/R and SP708R at +2.63V SP706S and SP708S at +2.93V SP706T and SP708T at +3.08V s RESET Pulse Width - 200ms s Independent Watchdog Timer - 1.6 sec Timeout (SP706P/S/R/T) s 40A Maximum Supply Current s Debounced TTL/CMOS Manual-Reset Input s RESET Asserted Down to VCC = 1V s RESET Output: SP706P Active-High SP706R/S/T Active-Low SP708R/S/T Both Active High + Active Low s WDI Can Be Left Floating, Disabling the Watchdog Function DESCRIPTION The SP706P/S/R/T, SP708R/S/T series is a family of microprocessor (P) supervisory circuits that integrate myriad components involved in discrete solutions which monitor power-supply and battery, in P, and digital systems. The SP706P/S/R/T, SP708R/S/T series will significantly improve system reliability and operational efficiency when compared to results obtained with discrete components. The features of the SP706P/S/R/T, SP708R/S/T series include a watchdog timer, a P reset, a Power Fail Comparator, and a manual-reset input. The SP706P/ S/R/T, SP708R/S/T series is ideal for +3.0V or +3.3V applications in automotive systems, computers, controllers, and intelligent instruments. The SP706P/S/R/T, SP708R/S/T series is an ideal solution for systems in which critical monitoring of the power supply to the P and related digital components is demanded. Part Number SP706P SP706R SP706S SP706T SP708R SP708S SP708T Rev. 10-17-00 s Built-In Vcc Glitch Immunity s Available in 8-pin PDIP, NSOIC, and SOIC packages s Voltage Monitor for Power Failure or Low Battery Warning s Pin Compatible Enhancement to Industry Standards 706P/R/S/T and 708R/S/T RESET Active HIGH LOW LOW LOW LOW/HIGH LOW/HIGH LOW/HIGH RESET Threshold 2.63V 2.63V 2.93V 3.08V 2.63V 2.93V 3.08V Manual Reset YES YES YES YES YES YES YES PFI Accuracy 4% 4% 4% 4% 4% 4% 4% Watchdog Input YES YES YES YES NO NO NO SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 1 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Terminal Voltage (with respect to GND): VCC........................................................-0.3V to +6.0V All Other Inputs (Note 1)..............-0.3V to (VCC +3.0V) Input Current: VCC.....................................................................20mA GND...................................................................20mA Output Current (all outputs)...............................20mA ESD Rating...........................................................2kV Continuous Power Dissipation Plastic DIP (derate 9.09mW/OC above +70OC)..................727mW SO (derate 5.88mW/OC above +70OC)..................471mW Mini SO (derate 4.10mW/OC above +70OC)..................330mW Storage Temperature Range.............-65C to +160C Lead Temperature (solding 10 sec)................+300C SPECIFICATIONS Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted, typical at 25C. PARAMETER Operating Voltage Range, VCC Supply Current, ISUPPLY Reset Threshold MIN. 1.0 TYP. MAX. 5.5 40 2.70 3.00 3.15 280 UNITS V A V mV ms CONDITIONS 2.55 2.85 3.00 140 0.8xVCC Reset Threshold Hysteresis Reset Pulse Width, tRS RESET Output Voltage VOH VOL VOH VOL RESET Output Voltage VOH VOL VOH VOL Watchdog Timeout Period, tWD WDI Pulse Width, tWP WDI Input Threshold, VIL VIH VIL VIH WDI Input Current 25 2.63 2.93 3.08 20 200 MR=VCC or Floating, WDI Floating SP70_P/R SP70_S SP70_T Note 2 Note 2 VRST(MAX) V V s ns 0.6 0.7xVCC 0.8 3.5 -1 0.02 1 A V Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 2 SPECIFICATIONS (continued) Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted, typical at 25C. PARAMETER WDO Output Voltage VOH VOL VOH VOL MR Pull-Up Current MR Pulse Width, tMR MR Input Threshold VIL VIH VIL VIH MR to Reset Out Delay, tMD PFI Input Threshold PFI Input Current PFO Output Voltage VOH VOL VOH VOL MIN. TYP. MAX. UNITS CONDITIONS VRST(MAX) ns VRST(MAX) SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 3 DIP and SOIC SOIC MR 1 VCC 2 GND 3 PFI 4 SP706P/R/S/T 8 WDO RESET / RESET* 1 WDO 2 MR 3 VCC 4 SP706P/R/S/T 8 WDI 7 RESET / RESET* 6 5 WDI PFO 7 PFO 6 5 PFI GND MR 1 VCC 2 GND 3 PFI 4 SP708S/R/T 8 RESET RESET 1 RESET 2 MR 3 VCC 4 SP708S/R/T 8 N.C. 7 RESET 6 5 N.C. PFO *SP706P only 7 PFO 6 5 PFI GND *SP706P only Figure 1. Pinouts Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 4 PIN DESCRIPTION NAME FUNCTION SP706P DIP/ SOIC SOIC SP706R/S/T DIP/ SOIC SOIC SP708R/S/T DIP/ SOIC SOIC MR Manual Reset - This input triggers a reset pulse when pulled below 0.8V. This active-LOW input has an internal 70A pull-up current. It can be driven from a TTL or CMOS logic line or shorted to ground with a switch Voltage input. Ground reference for all signals Power-Fail Input - When this voltage monitor input is less than 1.25V, PFO goes LOW. Connect PFI to ground or VCC when not in use. Power-Fail Output - This output is HIGH until PFI is less than 1.25V. Watchdog Input - If this input remains HIGH or LOW for 1.6s, the internal watchdog timer times out and WDO goes LOW. Floating WDI or connecting WDI to a high-impedance tri-state buffer disables the watchdog feature. The internal watchdog timer clears whenever RESET is asserted, WDI is tri-stated, or whenever WDI sees a rising or falling edge. No Connect. Active-LOW RESET Output - This output pulses LOW for 200ms when triggered and stays LOW whenever VCC is below the reset threshold. It remains LOW for 200ms after Vcc rises above the reset threshold or MR goes from LOW to HIGH. A watchdog timeout will not trigger RESET unless WDO is connected to MR. Watchdog Output - This output pulls LOW when the internal watchdog timer finishes its 1.6s count and does not go HIGH again until the watchdog is cleared. WDO also goes LOW during low-line conditions. Whenever VCC is below the reset threshold, WDO stays LOW. However, unlike RESET, WDO does not have a minimum pulse width. As soon as VCC is above the reset threshold, WDO goes HIGH with no delay. Active-HIGH RESET Output - This output is the complement of RESET. Whenever RESET is HIGH, RESET is LOW, and vice versa. Note the SP708R/S/T has a reset output only. 1 3 1 3 1 3 VCC GND PFI 2 3 4 4 5 6 2 3 4 4 5 6 2 3 4 4 5 6 PFO 5 7 5 7 5 7 WDI 6 8 6 8 - - N.C. - - - - 6 8 RESET - - 7 1 7 1 WDO 8 2 8 2 - - RESET 7 1 - - 8 2 Table 1. Device Pin Description Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 5 WDI VCC WATCHDOG TRANSITION DETECTOR WATCHDOG TIMER WDO 70A MR TIMEBASE FOR RESET AND WATCHDOG RESET GENERATOR RESET/RESET* VCC 2.63V for the SP706P/R 2.93V for the SP706S 3.08V for the SP706T PFI PFO 1.25V SP706P/R/S/T GND * For the SP706P only Figure 2. Internal Block Diagram for the SP706P/R/S/T VCC RESET 250A MR RESET GENERATOR RESET VCC 2.63V for the SP708R 2.93V for the SP708S 3.08V for the SP708T PFI PFO 1.25V SP708R/S/T GND Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 6 +3.3V 1.2V 1.4V PFI VCC = +3.3V TA = +25 C PFI PFO +1.25V 30pF 1K 3V PFO 0V Figure 4A. Power-Fail Comparator De-assertion Response Time. Figure 4B. Circuit for the Power-Fail Comparator De-assertion Response Time. +3.3V 1.4V PFI 1.2V VCC = +3.3V TA = +25 C 1K PFI 3V PFO 30pF PFO 0V +1.25V Figure 5A. Power-Fail Comparator Assertion Response Time. Figure 5B. Circuit for the Power-Fail Comparator Assertion Response Time. VCC TA = +25oC 3.6V VCC VCC 2K 0V RESET RESET RESET 330pF GND Figure 6A. SP706 RESET Output Voltage vs. Supply Voltage. Rev. 10-17-00 Figure 6B. Circuit for the SP706 RESET Output Voltage vs. Supply Voltage. (c) Copyright 2000 Sipex Corporation SP706 +3.0/ +3.3 Low Power Microprocessor Circuits 7 VCC TA = +25oC VCC 10K RESET RESET 330pF GND Figure 7A. SP706 RESET Response Time Figure 7B. Circuit for the SP706 RESET Response Time 3.2V RESET 2.8V RESET 0V 3.2V 0V 2.8V RESET RESET 0V 0V Figure 8. SP708 RESET and RESET Assertion Figure 9. SP708 RESET and RESET De-Assertion VCC TA = +25oC VCC 10K RESET 330pF RESET 330pF GND 10K Figure 10. Circuit for the SP708 RESET and RESET Assertion and De-Assertion Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 8 3.6V VCC 0V RESET 0V Figure 11. SP708 RESET Output Voltage vs. Supply Voltage Figure 12. SP708 RESET Response Time VCC VCC RESET 330pF GND 10K Figure 13. Circuit for the SP708 RESET Output Voltage vs. Supply Voltage and the RESET Response Time Figures Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 9 FEATURES The SP706P/R/S/T-SP708R/S/T series provides four key functions: 1. A reset output during power-up, power-down and brownout conditions. 2. An independent watchdog output that goes LOW if the watchdog input has not been toggled within 1.6 sec. 3. A 1.25V threshold detector for power-fail warning, low battery detection, or monitoring a power supply other than +3.3V/+3.0V. 4. An active-LOW manual-reset that allows RESET to be triggered by a pushbutton switch. The SP706R/S/T devices are the same as the SP708R/S/T devices except for the active-HIGH RESET substitution of the watchdog timer. The SP706P device is the same as the SP706R device except an active-HIGH RESET is provided rather than an active-LOW RESET. THEORY OF OPERATION The SP706P/R/S/T-SP708R/S/T series is a microprocessor (P) supervisory circuit that monitors the power supplied to digital circuits such as microprocessors, microcontrollers, or memory. The series is an ideal solution for portable, battery-powered equipment that requires power supply monitoring. Implementing this series will reduce the number of components and overall complexity of a system. The watchdog functions of this product family will continuously oversee the operational status of a system. The operational features and benefits of the SP706P/R/S/T-SP708R/S/T series are described, in more detail, below. RESET Output A microprocessor's reset input starts the P in a known state. The SP706P/R/S/T-SP708R/ S/T series asserts reset during power-up and prevents code execution errors during powerdown or brownout conditions. During power-up, once VCC reaches 1V, RESET is a guaranteed logic LOW of 0.4V or less. As VCC rises, RESET stays LOW. When VCC rises above Rev. 10-17-00 the reset threshold, an internal timer releases RESET after 200ms. RESET pulses LOW whenever VCC dips below the reset threshold, such as in a brownout condition. When a brownout condition occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 140ms. During power-down, once VCC falls below the reset threshold, RESET stays LOW and is guaranteed to be 0.4V or less until VCC drops below 1V. The active-HIGH RESET output is simply the complement of the RESET output and is guaranteed to be valid with VCC down to 1.1V. Some Ps, such as Intel's 80C51, require an active-HIGH reset pulse. Watchdog Timer The SP706P/R/S/T-SP708R/S/T series watchdog circuit monitors the P's activity. If the P does not toggle the watchdog input (WDI) within 1.6 seconds and WDI is not tri-stated, WDO goes LOW. As long as RESET is asserted or the WDI input is tri-stated, the watchdog timer will stay cleared and will not count. As soon as RESET is released and WDI is driven HIGH or LOW, the timer will start counting. Pulses as short as 50ns can be detected. Typically, WDO will be connected to the non-maskable interrupt input (NMI) of a P. When VCC drops below the reset threshold, WDO will go LOW independent of the current status of the watchdog timer. Normally this would trigger an NMI but RESET goes LOW simultaneously, and thus overrides the NMI. If WDI is left unconnected, WDO can be used as a low-line output. Since floating WDI disables the internal timer, WDO goes LOW only when V CC falls below the reset threshold, thus functioning as a low-line output. Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a 1.25V reference. (c) Copyright 2000 Sipex Corporation SP706 +3.0/ +3.3 Low Power Microprocessor Circuits 10 tWP tWD +3.3V tWD WDI WDO RESET* 0V +3.3V 0V tWD +3.3V 0V tRS +3.3V RESET* 0V * externally triggered LOW by MR, RESET is for the SP813L/813M only Figure 14. Watchdog Timing Waveforms Manual Reset To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider as shown in Figure 16. Choose the voltage divider ratio so that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. Use PFO to interrupt the P so it can prepare for an orderly power-down. The manual-reset input (MR) allows RESET to be triggered by a pushbutton switch. The switch is effectively debounced by the 140ms minimum RESET pulse width. MR is TTL/ CMOS logic compatible, so it can be driven by an external logic line. MR can be used to force a watchdog timeout to generate a RESET pulse in the SP706P/R/S/T-SP708R/S/T series. Simply connect WDO to MR. VRT +3.3V VCC VRT 0V +3.3V WDO 0V tRS +3.3V tRS RESET 0V +3.3V MR* 0V tMD *externally driven LOW tMR Figure 15. Timing Diagrams with WDI Tri-stated. The RESET Output is the Inverse of the RESET Waveform Shown. Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 11 Ensuring a Valid RESET Output Down to VCC = 0V When VCC falls below 1V, the RESET output no longer sinks current, it becomes an open circuit. High-impedance CMOS logic inputs can drift to undetermined voltages if left undriven. If a pulldown resistor is added to the RESET pin, any stray charge or leakage currents will be shunted to ground, holding RESET LOW. The resistor value is not critical. It should be about 100K, large enough not to load RESET and small enough to pull RESET to ground. Monitoring Voltages Other Than the Unregulated DC Input Monitor voltages other than the unregulated DC by connecting a voltage divider to PFI and adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI and GND will reduce the power-fail circuit's sensitivity to high-frequency noise on the line being monitored. RESET can be used to monitor voltages other than the +3.3V/+3.0V VCC line. Connect PFO to MR to initiate a RESET pulse when PFI drops below 1.25V. Figure 17 shows the SP706R/S/T-SP708R/ S/T series configured to assert RESET when the +3.3V/+3.0V supply falls below the RESET threshold, or when the +12V supply falls below approximately 11V. Monitoring a Negative Voltage Supply The power-fail comparator can also monitor a negative supply rail, shown in Figure 18. When the negative rail is good (a negative voltage of large magnitude), PFO is LOW. By adding the resistors and transistor as shown, a HIGH PFO triggers RESET. As long as PFO remains HIGH, the SP706P/R/S/T-SP708R/S/ T series will keep RESET asserted (where RESET = LOW and RESET = HIGH). Note that this circuit's accuracy depends on the PFI threshold tolerance, the VCC line, and the resistors. Interfacing to mPs with Bidirectional RESET Pins Ps with bidirectional RESET pins, such as the Motorola 68HC11 series, can contend with the RESET output. If, for example, the RESET Regulated +3.3V/+3.0V Power Supply Unregulated DC Power Supply VCC P RESET INTERRUPT I/O LINE NMI GND 0.1F VCC RESET PFO PFI WDO GND MR PFI R2 R1 +3.3V/+3.0V VCC MR PFO to P RESET GND +12V 1M 1% PFI 130K 1% PUSHBUTTON SWITCH Figure 16. Typical Operating Circuit Figure 17. Monitoring Both +3.3V/+3.0V and +12V Power Supplies SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation Rev. 10-17-00 12 output is driven HIGH and the P wants to pull it LOW, indeterminate logic levels may result. To correct this, connect a 4.7k resistor between the RESET output and the P reset I/O, as shown if Figure 19. Buffer the RESET output to other system components. Negative-Going VCC Transients While issuing resets to the P during power-up, power-down, and brownout conditions, these supervisors are relatively immune to shortduration negative-going VCC transients (glitches). It is usually undesirable to reset the P when VCC experiences only small glitches. Figure 20 shows maximum transient duration vs. reset-comparator overdrive, for which reset pulses are not generated. The data was generated using negative-going VCC pulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e. goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 40s or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. Applications The SP706P/R/S/T-SP708R/S/T series offers unmatched performance and the lowest power consumption for these industry standard devices. Refer to Figures 21 and 22 for supply current performance characteristics rated against temperature and supply voltages. +3.3V/+3.0V 100k 2N3904 to P VCC MR PFO 100k RESET VGND R1 = VCC - 1.25 , VTRIP < 0 1.25 - VTRIP R2 R2 PFI R1 Buffered RESET connects to System Components +3.3V/+3.0V VCC +3.3V/+3.0V VCC P RESET +3.3V MR 0V +3.3V PFO 0V VVTRIP 0V V- RESET 4.7K GND GND Figure 18. Monitoring a Negative Voltage Supply Figure 19. Interfacing to Microprocessors with Bidirectional RESET I/O for the SP706 (c) Copyright 2000 Sipex Corporation Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits 13 Maximum Transient Duration 100 80 Transient Duration (S) 20.2 20.1 20.0 Vcc=3.3V Supply Current (mA) 60 40 20 0 10 100 1nF Capacitor VOUT TO GND 19.9 19.8 Above Line RESET Generated NO RESET Generated 19.7 19.6 19.5 1000 10000 19.4 -60 -40 -20 0 20 40 60 80 100 Reset Overdrive (mV) Temperature (C) Figure 20. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive Figure 21. Supply Current vs. Temperature 30 28 26 Supply Current (A) 24 22 20 18 16 14 2.5 3 3.5 4 4.5 5 5.5 Supply Voltage (V) Figure 22. Supply Current vs. Supply Voltage Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 14 PACKAGE: PLASTIC DUAL-IN-LINE (NARROW) E1 E D1 = 0.005" min. (0.127 min.) D A1 = 0.015" min. (0.381min.) A = 0.210" max. (5.334 max). A2 C O eA = 0.300 BSC (7.620 BSC) L e = 0.100 BSC (2.540 BSC) B1 B ALTERNATE END PINS (BOTH ENDS) DIMENSIONS (Inches) Minimum/Maximum (mm) A2 B B1 C D E E1 L O 8-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 0.355/0.400 (9.017/10.160) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 15 PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW) E H h x 45 D A O e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H h L O 8-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249 0.014/0.019 (0.35/0.49) 0.189/0.197 (4.80/5.00) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 16 PACKAGE: PLASTIC MICRO SMALL OUTLINE (SOIC) 0.0256 BSC 0.012 0.003 0.0965 0.003 0.118 0.004 R .003 0.16 0.003 12.0 4 0.008 0 - 6 0.006 0.006 0.006 0.006 0.020 0.020 1 2 12.0 4 0.01 0.0215 0.006 0.037 Ref 3.0 3 0.116 0.004 0.034 0.004 0.040 0.003 0.116 0.004 0.013 0.005 0.118 0.004 0.004 0.002 0.118 0.004 All package dimensions are in inches 50 USOIC devices per tube Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 17 ORDERING INFORMATION Model ....................................................................................... Temperature Range ................................................................................ Package SP706PCP ..................................................................................... 0C to +70C ................................................................................... 8-pin PDIP SP706PCN ..................................................................................... 0C to +70C ................................................................................ 8-pin NSOIC SP706PCU ..................................................................................... 0C to +70C ................................................................................. 8-pin SOIC SP706RCP ..................................................................................... 0C to +70C ................................................................................... 8-pin PDIP SP706RCN ..................................................................................... 0C to +70C ................................................................................ 8-pin NSOIC SP706RCU ..................................................................................... 0C to +70C ................................................................................. 8-pin SOIC SP706SCP ..................................................................................... 0C to +70C ................................................................................... 8-pin PDIP SP706SCN ..................................................................................... 0C to +70C ................................................................................ 8-pin NSOIC SP706SCU ..................................................................................... 0C to +70C ................................................................................. 8-pin SOIC SP706TCP ..................................................................................... 0C to +70C ................................................................................... 8-pin PDIP SP706TCN ..................................................................................... 0C to +70C ................................................................................ 8-pin NSOIC SP706TCU ..................................................................................... 0C to +70C ................................................................................. 8-pin SOIC SP706PEP ................................................................................... SP706PEN ................................................................................... SP706PEU ................................................................................... SP706REP ................................................................................... SP706REN ................................................................................... SP706REU ................................................................................... SP706SEP ................................................................................... SP706SEN ................................................................................... SP706SEU ................................................................................... SP706TEP ................................................................................... SP706TEN ................................................................................... SP706TEU ................................................................................... -40C -40C -40C -40C -40C -40C -40C -40C -40C -40C -40C -40C to to to to to to to to to to to to +85C +85C +85C +85C +85C +85C +85C +85C +85C +85C +85C +85C ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC SP708RCP ..................................................................................... 0C SP708RCN ..................................................................................... 0C SP708RCU ..................................................................................... 0C SP708SCP ..................................................................................... 0C SP708SCN ..................................................................................... 0C SP708SCU ..................................................................................... 0C SP708TCP ..................................................................................... 0C SP708TCN ..................................................................................... 0C SP708TCU ..................................................................................... 0C SP708REP ................................................................................... SP708REN ................................................................................... SP708REU ................................................................................... SP708SEP ................................................................................... SP708SEN ................................................................................... SP708SEU ................................................................................... SP708TEP ................................................................................... SP708TEN ................................................................................... SP708TEU ................................................................................... to to to to to to to to to +70C +70C +70C +70C +70C +70C +70C +70C +70C ................................................................................... 8-pin PDIP ................................................................................ 8-pin NSOIC ................................................................................. 8-pin SOIC ................................................................................... 8-pin PDIP ................................................................................ 8-pin NSOIC ................................................................................. 8-pin SOIC ................................................................................... 8-pin PDIP ................................................................................ 8-pin NSOIC ................................................................................. 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC ................................................................................. 8-pin PDIP .............................................................................. 8-pin NSOIC ............................................................................... 8-pin SOIC -40C -40C -40C -40C -40C -40C -40C -40C -40C to to to to to to to to to +85C +85C +85C +85C +85C +85C +85C +85C +85C Please consult the factory for pricing and availability on a Tape-On-Reel option. Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev. 10-17-00 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits (c) Copyright 2000 Sipex Corporation 18 |
Price & Availability of SP708S
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